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G12474 - 74ALS841 10-Bit Bus-Interface D-Type Latch
These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type latches. The 74ALS841 hasnoninverting data (D) inputs. A buffered output-enable (OE) input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither loadnor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operation of the latches. Previously stored data can be retained or new data canbe entered while the outputs are off. The 74ALS841 is characterized for operation from 0°C to 70°C.
Features:
3-State Buffer-Type Outputs Drive Bus Lines Directly
Bus-Structured Pinout
Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
Buffered Control Inputs to Reduce dc Loading Effects
Power-Up High-Impedance State
24 pin DIP. Actual brand may vary from picture.
G12474
Features:
3-State Buffer-Type Outputs Drive Bus Lines Directly
Bus-Structured Pinout
Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
Buffered Control Inputs to Reduce dc Loading Effects
Power-Up High-Impedance State
24 pin DIP. Actual brand may vary from picture.
G12474
$1.22
Original: $3.50
-65%G12474 - 74ALS841 10-Bit Bus-Interface D-Type Latch—
$3.50
$1.22
Description
These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type latches. The 74ALS841 hasnoninverting data (D) inputs. A buffered output-enable (OE) input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither loadnor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operation of the latches. Previously stored data can be retained or new data canbe entered while the outputs are off. The 74ALS841 is characterized for operation from 0°C to 70°C.
Features:
3-State Buffer-Type Outputs Drive Bus Lines Directly
Bus-Structured Pinout
Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
Buffered Control Inputs to Reduce dc Loading Effects
Power-Up High-Impedance State
24 pin DIP. Actual brand may vary from picture.
G12474
Features:
3-State Buffer-Type Outputs Drive Bus Lines Directly
Bus-Structured Pinout
Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
Buffered Control Inputs to Reduce dc Loading Effects
Power-Up High-Impedance State
24 pin DIP. Actual brand may vary from picture.
G12474










